CEO Outlook: Chip Industry 2022

Semiconductor Engineering sat down to discuss broad industry changes and how that affects chip design with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight;…

Semiconductor Engineering sat down to discuss broad industry changes and how that affects chip design with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front of a live audience at the recent Electronic System Design Alliance event. What follows are excerpts of that discussion.

SE: One of the big shifts that’s happening today is that we’re moving from designing for spec toward design for context. Instead of a one size fits all, it’s now very domain-specific. How does that affect EDA? Faché: Many design teams are dealing with increased design complexity, more demanding performance requirements, cost constraints, and shorter design cycles. There’s a paradigm shift toward designing for context, and there’s much more emphasis on close collaboration across an entire industry food chain to really optimize the performance of the system and deal with integration challenges. It goes from a component like an RFID chipset into a sub-system, or maybe radar in automotive, and all of that all needs to get optimized. There’s much more concern about the bigger context. We also see much more vertical integration. In the automotive industry, they design the system end-to-end so they can really optimize every inch of that system. Think about optimizing a battery for use in a in a vehicle. That’s good news for EDA companies. There’s a bunch of opportunities around collaborative workflows to let these different specialists and multiple disciplines work together. We need good tools to manage and process data and IP. There’s an opportunity for model-based system engineering, and design all the way from the system level down to components. Models are always measurement-based, in part to help with accuracy and reduce physical prototyping. It’s also interesting to think about embedded as design for context. There may be an opportunity for a more formalized validation process in simulation of components in the context of a design. But it does require closer collaboration between the EDA companies, because we do need to interoperability all the way from product lifecycle management to simulation and process and data management — the EDA, the CAE tools — and ultimately also the instruments for testing. Segars: There’s always been design for context. You could design for automotive spec, you could design for commercial grade. But as things do become a bit more niche, the number of corners that people want to do for design closure increases. The amount of data that people are having to manage in their design process goes up. And the creation of some of these components gets more and more complex, because as you’re trying to optimize across multiple stages, you’re introducing new tools, new views that need creating. It all needs proof that it’s accurate before it actually gets handed off. This is a continuation continuation of what has been going on, but it’s going to lead to more complex designs. And complexity is something that this industry has been helping everybody deal with over the years. But that challenge is not going away. Sawicki: It’s important to step back for a second and consider why this context-based design is happening. The opportunities that are presented to the system by doing this bespoke type design are interesting. When Apple came out with a 64-bit processor, everyone asked, ‘Why a 64-bit processor? They don’t have the memory space. Why are they worried about that?’ They’re still at 4 gigabytes of memory, which you can address with 32 bits. But what did they get? They got 30% additional performance. That meant their phone could do so much more. And it means verification is no longer about the validated spec. It’s about how do you validate system performance, which brings about a whole new new level of complexity in terms of model availability, software stacks, being able to tie virtual models with the physical, the detailed design specs for certain aspects. And it’s become so much more complex, because what people are trying to do is not play spec wars. They’re trying deliver a better experience to the customer, which can enable them to be far more profitable during business. Devgan: This is not new. In the late ’90s and early 2000s we used to talk about domain-specific computing. What is different is that in those days it would take 400 or 500 people about four or five years to design the complex chip. Today we can do the same kind of complex chip with 50 people in six months. So there is at least a 10X times 10X improvement. Of course, the designs have gotten a lot more complicated, but it’s still almost a two orders of magnitude improvement. Now, of course, we always have to keep getting better and better, but the EDA and IP and foundry industries have made it much easier to design these things than 20 years ago. And then if you look at the system companies, they’re designing for three main reasons. One is it’s application specific, so it performs better or has lower power, and that can be significant if it is domain-specific. They also will do it for schedule, if they have to hit a certain schedule. And then, even though the cost of design is going up, if there is enough volume it is cost-effective, as well. You’re not buying from somebody else. You are making it yourself. So these three things allow more and more system companies to do to chip design, and that’s good for all of us. Fujimura: We’re in manufacturing and EDA, and one of the things we do is to help the mask industry design and manufacture photomasks. We definitely see a huge impact on what you’re talking about, because the mask count is going up tremendously right now. It’s always been true that people do derivative designs. Manufacturing costs per chip are actually lower than design costs for the entire platform, so delivering lower costs is extremely important. You could do one big design, and then you modify a little to fit each market. But right now, we’re seeing more of the return to that, perhaps because the integration of the different pieces is easier. SE: Since the 1980s, the mantra has always been go global to reduce costs. But over the past six years, we’ve seen a trade war with China, problems with Russia, supply chain glitches everywhere, and a growing level of distrust all around the world. What’s the impact on chip design? Segars: The industry has evolved and become very efficient. So work is done wherever it gets done efficiently, and capital gets deployed in concentrated ways. You get a concentration of manufacturing expertise. It gets designed here, and it gets packed up there. And we get unbelievable products at unbelievably low prices all the time, and they’ve been refreshed constantly. So the industry actually works really well, which is the product of optimizing for efficiency and low cost. Now, when you throw in supply chain security, because maybe I don’t trust this person, you’re going to have to start replicating things that exist in one or two places. That’s going to result in increased cost. It’s going to probably require better education, and it’s going to require different skill sets in different parts of the world. But it’s also going to result in increased cost. And what we don’t know is how the world is going to deal with that, because consumers are hooked on buying cheap stuff. Are you really going to go into a store and say, ‘I’m going to buy the device that’s 20% more expensive because the money ripples down the supply chain, and this state has a higher cost base than manufacturing in Taiwan?’ No one is ever going to do that. So how do you deal with the cost offset of taking this very economically efficient model, and spreading it around the world and duplicating it? There are clearly governments around the world looking to spend a lot of money to try and change things. But the amount they’re talking about is pretty small relative to the total amount of money that is spent on this whole industry. That’s going to tough to deal with. Sawicki: I probably spent four hours a week for the last three or four months speaking to congressional staffers, speaking to people in commerce. What is clear is that we are coming into an era where people are going to use our industry, and the semiconductor industry, as a weapon of national interest. That’s going to cause issues. It’s going to mean some level of bifurcation, because even if it doesn’t get executed on, keeping a supply source that you believe can be shut off by the next midterm election is just not a wise way to run a business. Where this lands I don’t know. We were spending lots of dollars in China on fabs, and there was no spending on EDA. That’s changed completely. But one of the things that makes EDA work well is getting that level of concentration of effort, which then gets spread among so many user. That is more effective than if all of a sudden we have an environment where there are multiple national entities that need to create their own industries in this space. Things will cost more. Faché: If you look at recent IPOs in China, about a billion dollars was invested in EDA companies. There’s a lot of investment in building capability, which in some ways is redundant. But as every region tries to build local ecosystems, we’re investing to address risks that we’ve been exposed to. If you look at the U.S. and Europe, local governments are considering subsidies on the order of $50 billion. And setting up a regional ecosystem with manufacturing is likely to cost hundreds of billions over the next decade. So we are considering very significant investments to address the risks that we see. And it is indeed a tradeoff between building up capacity and operating it, which is very expensive. But the economic impact of a supply disruption is very significant, as well. Fujimura: There is certain equipment that is not allowed to be exported to certain countries, too. The inability to use the most leading technology in China, let’s say, creates some opportunities for us, because some of the older technology nodes are the absolute bleeding edge for them. They will have to compete with what they have against companies that have the latest technologies. That creates an opportunity for software vendors to supply substitute technologies. So you can live off both, and in some ways that can be good. Devgan: I’m more optimistic. Nobody can predict the future, but I believe people will do the right things. So if you look China, we had some companies added to the Entity List a couple of years ago, and that did affect some business. But if you step back and look at the three-year CAGR in China, it’s in the low 20% growth range. We see that continuing in the future. So the players are different. There are more system companies doing chip design, and there is some local competition. We will deal with competition just like we do everywhere else. But I’m more optimistic that there is a lot of discussion in all governments, and maybe there is some investment, which is welcome. Related Chip Industry Heads Toward $1T Continued expansion in new and existing markets points to massive and sustained growth. Slowdown, But No Correction Materials supply chain still bumpy and consumer buying has peaked for now, but growth continues. Big Changes In Materials And Processes For IC Manufacturing Brewer Science’s CTO drills down into everything from purity and bonding to scaling and variation. Ed Sperling (all posts) Ed Sperling is the editor in chief of Semiconductor Engineering. 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